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姓名 何青原 (Ching-Yuan Ho)
組別 機械製造與材料組
教授室 91716室
分機 62165
  1. 國立清華大學電子工程博士
  1. Associate Professor, Department of Mechanical Engineering, National Cheng Kung University, Taiwan. 2020/02~
  2. Professor, Department of Mechanical Engineering, Chung Yuan Christian University, Taiwan. (2010/2/1 - 2020/01/31)
  3. Furnace Department RD manager, Powerchip Semiconductor Company. (2006/10 - 2009/1)
  4. Researcher, Electronic & Optoelectronic system research Laboratories , Industrial Technology Research Institute, 2004/09~2006/09
  5. Integration technical manager, BEOL Technology Division, Taiwan Semiconductor Manufacturing Company, 1995/09~2002/08
  1. VLSI process integration, nano material application, metal corrosion analysis, solar cell and hydrogen generation

1. 工業技術研究院九十四年研究金牌獎,“高密度與低耗能磁性記憶體研究開發”.

2. 2016台北國際發明暨技術交易展,專利發明銅牌.


中華民國專利 Patents

[1]  何青原, 林錫堅, 蕭國坤, “介電層的製造方法” 中華民國專利I304231號.

[2] 何青原, 林錫堅, 蕭國坤, “浮置閘極與非揮發性記憶體的製造方法,” 中華民國專利I296837號.

[3] 李亨元, 何青原, 李隆盛, 梁虔碩, “空心柱型電容器及其製造方法,” 中華民國專利I297931號.

[4] 何青原, “可降低位元線電流之磁性隨機存取記憶體及其製造方法,” 中華民國專利I266413號.

[5] 葉進男, 簡廷憲, 何青原, 尤崇茵,“彩色濾光基板及其製造方法,” 中華民國專利 I260431號.

[6] 何青原, 侯上勇, “插塞的製造方法,”中華民國專利 412853號.

[7] 何青原, “金屬插塞的製造方法,” 中華民國專利386297號.

          [8] 何青原, “接觸窗開口的製造方法,” 中華民國專利365699號.

          [9] 何青原, “金屬插塞的製造方法,” 中華民國專利365700號.

         [10] 何青原, “金屬層間介電層的結構與製造方法,” 中華民國專利365052號.

         [11] 何青原, “形成淺溝渠的方法” 中華民國專利350122號.

 [12] 何青原, “淺溝渠隔離製程中的頂角圓化方法” 中華民國專利328162號.

 [13] 何青原,陳永祥,”半導體裝置之製造方法” 中華民國專利I312152號.

[14] 何青原, 卓志臣, “光阻層的重工方法與圖案化製程,中華民國專利200845117號

[15] 何青原, 蕭國坤, “淺溝渠隔離結構及浮置閘極的製作方法, 中華民國專利200837895號

[16] 何青原, 蕭國坤, “浮置閘極的製造方法及記憶體的製造方法”, 中華民國專利200822373號

[17] 何青原, 蕭國坤, “記憶體的製造方法及半導體元件的製造方法”, 中華民國專利200816392號

[18] 何青原, 蕭國坤, “浮置閘極的製造方法與非揮發性記憶體的製造方法”, 中華民國專利200814165號

[19]何青原, 蕭國坤, “高耦合比之非揮發性記憶體的製造方法”,中華民國專利200812009號

[20]何青原, 蕭國坤, “隔離結構的製造方法”, 中華民國專利200805559號

[21]何青原, 陳永祥, “半導體裝置之製造方法、磁性記憶體之製造方法及其磁性記憶體”, 中華民國專利200727293號

[22]何青原, 連振炘, “降低源極汲極片電阻之半導體裝置製造方法”, 中華民國專利200725707號

[23]何青原, 魏鴻基,畢嘉慧,卓志臣”非揮發性記憶體的製造方法”, 中華民國專利200913167號

[24]何青原,”浮置閘極的製造方法”, 中華民國專利200913168號

[25] 何青原, 劉應勵, ”快閃記憶體及其製造方法”, 中華民國專利200929528號

[26] 何青原, 藤田博丈,江柏叡,”元件的製造方法”,中華民國專利201010013號

[27]何青原,李昌駿, “金屬凸塊之形成方法",中華民國發明第I521622


[1] Ho, Ching-Yuan, Lien, Chen-Hsin, “Method for fabricating semiconductor device to lower source/drain sheet resistance”, USA patent #7,465,664

[2] Lee, Heng-Yuan, Ho, Ching-Yuan, Lee, Lurng-Shehng, Liang, Chieh-Shuo, “Method of fabricating a cylindrical capacitor”, USA patent #7,332,393.,

[3]Ho, Ching-Yuan, “Method for manufacturing interconnecting plug”, USA patent #6,146,995.

[4] Ho, Ching-Yuan, Hou, Shang-Yun, “Method for manufacturing interconnection plug”, USA patent #5,981,386.

[5] Ho, Michael, “Trench isolation process”, USA patent #5,880,004.

[6] Ho, Michael, “Method of forming top corner rounding of shallow trenches in semiconductor substrate”, USA patent #5,858,857.

[7] Ho, Ching-Yuan, Chen, Yung-Hsiang,“Method for manufacturing a semiconductor device, method for manufacturing magnetic memory, and the magnetic memory thereof”, USA patent#7,473,641.

[8] Lee. Heng-Yuan,Ho. Ching-Yuan,Lee. Lurng-Shehng, Liang, Chieh-Shuo; “cylindrical capacitor ”, USA patent #20080094776

[9] Ho. Ching-Yuan, “Magnetic random access memory with reduced currents in a bit line and manufacturing method thereof”,USA patent# 20060097298

[10] Ho; Ching-Yuan,Fujita; Hirotake;Chiang, Po-Jui; “Method of fabrication device”, USA patent #20100093142

[11] Ho; Ching-Yuan,“Magnetic random access memory with reduced currents in a bit line and manufacturing method thereof”, USA patent#20060097298

[12] Ching-Yuan Ho, Chang-Chun Lee, “Method of Forming metal bump”, USA patent # 9,129957 B1

[13]Ching-Yuan Ho, Chang-Chun Lee, “Method of forming a metal bump”, US 9,129,957 B1



International Journal Papers(SCI)

  1. Ching-Yuan Ho*, Hsin Cheng, Yuan-Chih Chang, Hwa-Teng Lee, Investigation of Various Bumps and Redistribution Lines to Inhibit Protected Silicon Nitride Cracks in High Pattern Density Chip Package, J. Electronic materials, 49 (2020) 5613-5621.
  2. Ching-Yuan Ho*, Chia-Wei Lin, Yueh-Yang Lee, Shao-Chien Cheng, Interfacial evolution and mechanical properties of Au–Sn solder jointed Cu heat sink during high temperature storage test, Materials Letters 275 (2020) 128103.
  3. Ching-Yuan Ho, Yi-Shio Wu, Diamine decorated graphene oxide film on quartz crystal microbalance for humidity-sensing analysis, Applied Surface Science 510 (2020) 145257.
  4. Cheng Pu Hsieh, Ching Yuan Ho*, Li Chung. Hsu, Yaw-Jen Chang, Synergistic effect on hydrolytic sodium borohydride adding waste Al for hydrogen generation, Int. J. Hydrogen energy 45 (2020) 10334-10341
  5. Ching-Yuan Ho*; Shih-Ming Huang; Sze-Tsen Lee; Yaw-Jen Chang, Evaluation of synthesized graphene oxide as corrosion protection film coating on steel substrate by electrophoretic deposition, Applied surface science, 477 (2019) 226-231.
  6. Cheng Pu Hsieh; Ching-Yuan Ho*; Shih-Ming Huang; T. I. Yang; Yaw-Jen Chang , “Measurements of synthesized graphene oxides electrophoresed deposition for ultrasensitive humidity detection” , 2019 , Materials Science and Engineering B , vol.243 , p.149-157.
  7. Ching-Yuan Ho* and Yaw-Jen Chang,Evaluation of Schottky barrier source/drain contact on gate-all-around polycrystalline silicon nanowire MOSFET, Materials Science in Semiconductor Processing, 61 (2017) 150-155. 
  8. Ching-Yuan Ho*, Hydrolytic reaction of waste aluminum foils for high efficiency of hydrogen generation, International journal of hydrogen energy, 42 (2017) 19622-19628.
  9. Yi-Hua Fan; Ching-Yuan Ho*; Yaw-Jen Chang , nhancement of dye-sensitized solar cells efficiency using mixed-phase of TiO2 nanoparticles as photo-anode, Scanning, vol. 2017, ID: 9152973, p.1-7.
  10. Ching-Yuan Ho*; Yi-Hua Fan; and Yaw-Jen Chang , High Efficiency of Electroplating Ni–Co Nanowires Upon the Capture of Immobilization of Histidine-Tagged Protein, Journal of nanoscience and nanotechnology, 17 (2017) 4778-4783.
  11. Ku-Yen Lin; Yan-Jun Wang; Ko-Lun Chen; Ching-Yuan Ho; Chun-Chuen Yang; Ji-Lin Shen; and Kuan-Cheng Chiu , Role of molecular conformations in rubrene polycrystalline films growth from vacuum deposition at various substrate temperatures, Scientific Reports, 7 (2017) 40824
  12. Ching-Yuan Ho*, Effects of self-aligned electroplating Cu pillar/Sn-xAg bump on dense Al lines for chip-to-package connection, Materials Science in Semiconductor Processing, 49 ( 2016) 1-7
  13. Ching-Yuan Ho*, Chi-Hang Huang, Enhancement of hydrogen generation using waste aluminum cans hydrolysis in low alkaline de-ionized water, Int. J. Hydrogen energy, 41 (2016) 3741-3747.
  14. Ku-Yen Lin, Yan-Jun Wang, Ko-Lun Chen, Chun-Chuen Yang, Ching-Yuan Ho, Kueir-Rarn Lee, Ji-Lin Shen, Kuan-Cheng Chiu* , “Rubrene polycrystalline films growth from vacuum deposition at various substrate temperatures” , Journal of Crystal Growth 439 (2016) 54-59.
  15. Ching-Yuan Ho, Yi-Hua Fan, and Yaw-Jen Chang, High Efficiency of Electroplating Ni–Co Nanowires Upon the Capture of Immobilization of Histidine-Tagged Protein, Journal of Nanoscience and Nanotechnology 16 (2016) 1–6
  16. Ching-Yuan Ho* and Yaw-Jen Chang, Effects of various gate materials on electrical degradation of a-Si:H TFT in industrial display application, Solid state electronic, 116 (2016) 130-134.
  17. Ching-Yuan Ho*, Hong-Wen Wang, Characteristics of thermally reduced graphene oxide and applied for dye-sensitized solar cell counter electrode, Applied surface science357 (2015) 147-154.
  18. Ching-Yuan Ho*, J. K. Lin, Hong-Wen Wang, Characteristics of Boron Decorated TiO2 Nanoparticles for Dye-sensitized Solar Cell Photoanode, International Journal of Photoenergy, Volume 2015, Article ID 689702, 8 pages.
  19. Ching-Yuan Ho*, Tzu- Hsuan Lin, Yaw-Jen Chang, Influence of various annealed Ni-Co nanowire properties upon the capability of immobilization of histidine-tagged protein, Journal of Alloys and Compounds 648 (2015) 726-731.
  20. Ching-Yuan Ho*, Chun-Chi Liang, Hong-Wen Wang, Investigation of low thermal reduction of graphene oxide for dye-sensitized solar cell counter electrode, Colloids and Surfaces A. 481 (2015) 222-228..
  21. Yaw-Jen Chang*, Sheng-Zheng Chen, Ching-Yuan Ho*, Crystallographic structure of Ni–Co coating on the affinity adsorption of histidine-tagged protein, Colloids and Surfaces B: Biointerfaces 128 (2015) 55–60
  22. Yaw-Jen Chang*; Ching-Yuan Ho; Cheng-Hao Chang , “Influence of Material Properties Upon Immobilization of Histidine-Tagged Protein on Ni–Co Coated Chip” , 2014 , Materials Science and Engineering C-Materials for Biological Applications, 37 (2014) 369-373.
  23. Ching-Yuan Ho*, Yaw-Jen Chang,Y. L. Chiou, Enhancement of programming speed on gate-all-around poly-silicon nanowire nonvolatile memory using self-aligned NiSi Schottky barrier source/drain, Journal of Applied Physics, 114, pp. 054503 (2013)
  24. Alagesan Subramanian; Ching-Yuan Ho*; Hongwen Wang, Investigation of Various Photoanode Structures on Dye-sensitized Solar Cell Performance using Mixed-phase TiO2 , 2013 , Journal of alloys and compounds , 572, pp. 11-16 , (2013)
  25. Ching-Yuan Ho*,Yaw-Jen Chang, C. C Lee, W. Chang, H. W. Wang, and Y. Kang, Ambipolar Conduction Behavior on High Performance Schottky Barrier Source/Drain Gate-All-Around Si Nanowire Nonvolatile SONOS Memory, ECS Journal of Solid State Science and Technology, 1 (5) pp. 241-245 (2012)
  26. Ching-Yuan Ho*, Y. F. Chen, C. W. Ho, Wei Chang, S. W. Chou, J. Gong, Retention Behavior using SiN Spacers Charging on nMOSFETs for Future Nonvolatile Memory Application, J. Electrochem. Soc, 158 (9) H536-539 (2011)
  27. Szetsen Lee, Jr-Wei Peng, Ching-Yuan Ho, Reversible tuning of ZnO optical band gap by plasma treatment, Materials Chemistry and Physics, 131, pp.211-215 (2011)
  28. Y. D. Chiang, W. Y. Chang, C. Y. Ho, C. Y. Chen, C. H. Ho, S. J. Lin, T. B. Wu, and J. H. He, Single ZnO Nanowire Memory, IEEE Trans. Electron Dev, 58, pp. 1735 (2011)
  29. Ching Yuan Ho* and Chenhsin Lien, “Study of Retention Characteristics and Program Speed Enhancement Using Plasma Nitridation on Inter-Poly Dielectric”. J. Electrochem. Soc, 157 (9) H904-907 (2010).
  30. Ching Yuan Ho*, X. J. Lin, H. R. Chienand Chenhsin Lien, “High Aspect Ratio Contact Hole Etching using Relatively Transparent Amorphous Carbon Hard Mask Deposited from Propylene”,Thin Solid Films, 518 (2010), pp. 6076.
  31. C. Y. Ho, S. S. Chiu, T. C. Kei, K. T. Tsai, Y. A. Dai, J. H. Hsu, M. L. Chang, and J. H. He, "Contact Behavior of Focused Ion Beam-Deposited Pt on p-type Si Nanowire”, Nanotechnology, 21, 134008, 2010.
  32. Ching Yuan. Ho*, Kai-Yao. Shih and Jr Hau He, “Gate Oxide Wear out Using Novel Polysilazane-base Inorganic as Nano-scaling Shallow Trench Filling”, Microelectronic Engineering, Vol. 87, pp. 580, 2010.
  33. Ching-Yuan Ho*, Chenhsin Lien, Y. Sakamoto, R.J. Yang, Hiro Fijita, C.H. Liu, Y.M. Lin, S. Pittikoun and S. Aritome, “Improvement of Inter-Poly Dielectric Characteristics by Plasma Nitridation and Oxidation for Future NAND Flash Memory”, IEEE Electron Device Letts., Vol. 29, No. 11, pp. 1199, 2008.
  34. Ching-Yuan Ho*, Chenhsin Lien, Po-Jui Chiang, and Kai-Yao Shih, “Investigation of Sidewall Oxidation on WSix Gates for Nano-Scale NAND Flash Memory Cells”, Jpn. J. Appl. Phys, 47 (2008), pp. 7818.
  35. Ching-Yuan Hoand Chun-Hsing Shih,“Edge Encroachments and Suppressions of Tunnel Oxide in Flash Memory Cells”, IEEE Electron Device Letts., Vol. 29, No. 10, pp. 1159, 2008.
  36. Ching-Yuan Ho*, Jr Hau He, Yuan-Pal Chang, Chenhsin-Lien, “Selective Epitaxial Silicon Growth in High Aspect Ratio Contact on 70nm Node Flash Memory”, Thin Solid Films, 517 (2009), pp. 6850.
  37. Ching Yuan Ho*, Chenhsin Lien, C. H. Liu, Y. M. Lin and S. Pittikoun, “Influence of Rapid Thermal Annealing in N2 and Stacked-layer on SiO2-Al2O3-SiO2 Characteristics for Interpoly Dielectric”, Jpn. J. Appl. Phys. 48 (2009), pp. 046503